RF desense can significantly affect wireless connectivity performance in consumer electronic devices. In this paper, a workflow is presented to predict RF desense risk before the hardware prototyping stage using a combination of 3D EM simulation and board level RF system test through a consumer electronic prototype application example. First, a noise floor test is performed on the radio receiver modules to quantify the noise power level which could desensitize the radio receiver modules in the application prototype. Next, a full wave 3D EM simulation is utilized to compute the simulated noise power level coupled from a high-speed digital system to the radio receiver modules through the antennas in the application prototype. The noise power levels quantified through the noise floor test are used as a guideline to compare against the simulated noise coupled to the radio receiver system to analytically predict RF desense levels. The predicted RF desense levels are compared with direct desense validation results measured on hardware prototype samples to validate the accuracy of the simulation outcome. This technique can be used to predict RF desense risk during the early hardware prototype phase to help inform hardware design engineers to make better design decisions to mitigate RF desense risk.