Gate Reduction at Distributed Edge (GRaDE)

This lecture presents a new mission engineering approach for adapting to varying processing requirements for platforms, e.g., Unmanned Autonomous Systems (UAS), aircraft, and satellites, that have severe Size, Weight and Power and Cost (SWaP-C) limitations.  When used for some missions, such as those for the military, these platforms are considered to be edge-based entities, where the term edge refers to the far boundaries of the battle space.

The challenge for mission engineering in this environment is to specify and design a system that fully supports mission requirements, where high SWaP-C is not an option.  One way to achieve this is through reduction of processing circuitry.  Traditional means to do so apply logic gate reduction using combinatorial logic design based on algebraic mathematics and graph theoretical approaches. An alternative to this is to apply distributed quantum computing gate-model principles.  Presently, these approaches have been implemented independently, thereby fail to take advantage of overlapping principles that could provide greater reduction in logic and corresponding SWaP-C at the edge.  What is needed is a new break-through approach, derived through mission engineering, that combines these technologies to provide high Gate Reduction at the Distributed Edge (GRaDE), and that allows adaptability to constantly changing processing requirements during a mission. This paper describes the novel GRaDE approach, along with its process, algorithms, and description of reduction to practice for solving the above problem.